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| Short bio: | I am a post-doctoral researcher at Institute of Science and Technology (IST) Austria in the group of Tom Henzinger. I did my PhD in Verimag, Grenoble under the supervision of Oded Maler. |
| Coordinates: |
Mail: Am Campus 1, A-3400 Klosterneuburg, Austria Email: firstname.lastname@ist.ac.at Phone: +43 2243 9000 3508 Fax: +43 2243 9000 2000 |
| Research Interests: |
Timed automata and real-time logics Monitoring Component-based design Property-based analysis of analog and mixed-signal systems |
| Events: | Publications: |
Conference papers:D. Nickovic and N. Piterman. From MTL to Deterministic Timed Automata, In {\em Proc. Formal Modelling and Analysis of Timed Systems (FORMATS)}, 2010 (to appear). L. Doyen, T. Henzinger, A. Legay and D. Nickovic. Robustness of Sequential Circuits, In {\em Proc. Application of Concurrency to System Design (ACSD)}, 2010. O. Maler, D. Nickovic and A. Pnueli. Checking Temporal Properties of Discrete, Timed and Continuous Behaviors, In {\em Pillars of Computer Science}, 2008. D. Nickovic and O. Maler. {\sc AMT}: A Property-based Monitoring Tool for Analog Systems, In {\em Proc. Formal Modelling and Analysis of Timed Systems (FORMATS)}, 2007. O. Maler, D. Nickovic and A. Pnueli. On Synthesizing Controllers from Bounded-Response Properties, In {\em Proc. Computer Aided Verification (CAV)}, 2007. [paper][slides] O. Maler, D. Nickovic and A. Pnueli. From MITL to Timed Automata. In {\em Proc. Formal Modelling and Analysis of Timed Systems (FORMATS)}, 2006. O. Maler, D. Nickovic and A. Pnueli. Real Time Temporal Logic: Past, Present, Future. In {\em Proc. Formal Modelling and Analysis of Timed Systems (FORMATS)}, 2005. Journal papers:K. Jones, V. Konrad and D. Nickovic. Analog Property Checkers: A {\sc Ddr2} Case Study. In {\em Formal Methods in System Design (FMSD)}, 2009. Miscellaneous:D. Nickovic and N. Piterman. From MTL to Deterministic Timed Automata, {\em Technical Report 2009/2 Imperial College London}, 2009. D. Nickovic. Checking Timed and Hybrid Properties: Theory and Applications, {\em PhD Thesis}, 2008. |
| Tools: | Analog Monitoring Tool (AMT) |
| Curriculum Vitae: | CV |
| Professional Activities: |
Program Committee member of the Eleventh International Conference on Application of Concurrency to System Design 2011 (ACSD'11) Organizing Committee member of the 8th International Conference on Formal Modeling and Analysis of Timed Systems 2010 (FORMATS'10) Program Committee member of the Third Workshop on Foundations of Interface Technologies 2010 (FIT'10) Program Committee member of the Third Workshop on Interaction and Concurrency Experience 2010 (ICE'10) Program Committee member of the Second Workshop on Interaction and Concurrency Experience 2009 (ICE'09) Program Committee member of the Eight Workshop on Runtime Verification 2008 (RV'08) |